Memory devices using semiconductor elements are roughly classified into volatile memory devices that lose their stored contents when power supply is stopped and non-volatile memory devices that can retain their stored contents even when power supply is stopped.
As a typical example of a volatile memory device, a dynamic random access memory (DRAM) is given. In a DRAM, a transistor included in a memory element is selected and a charge is accumulated in a capacitor, so that data is stored.
Owing to the above-described principle, charge in a capacitor is lost when data is read out in a DRAM; thus, it is necessary to perform writing again so that data is stored again after reading data. In addition, there is leakage current in a transistor included in a memory element and charge stored in the capacitor flows or a charge flows into the capacitor even if the transistor is not selected, whereby data retention period is short. Therefore, it is necessary to perform writing again in a predetermined cycle (refresh operation) and it is difficult to reduce power consumption sufficiently. Further, since memory content is lost when the power is not supplied to a DRAM, another memory device using a magnetic material or an optical material is needed to stored memory for a long period.
As another example of a volatile memory device, a static random access memory (SRAM) is given. In an SRAM, stored contents are retained using a circuit such as a flip flop, so that refresh operation is not needed. In view of this point, an SRAM is more advantageous than a DRAM. However, there is a problem in that a cost per storage capacity becomes high because a circuit such as a flip flop is used. Further, in view of the point that stored contents are lost when the power is not supplied, an SRAM is not superior to a DRAM.
As a typical example of a non-volatile memory device, a flash memory is given. A flash memory includes a floating gate between a gate electrode and a channel formation region in a transistor. A flash memory stores memory by retaining charge in the floating gate, so that a data retention period is extremely long (semi-permanent), and thus, has an advantage that refresh operation, which is necessary in a volatile memory device, is not needed (for example, see Patent Document 1).
However, in a flash memory, there is a problem in that a memory element does not function after performing writing a predetermined number of times because a gate insulating layer included in the memory element is deteriorated due to tunnel current which occurs when performing writing. In order to relieve an effect of this problem, for example, a method of equalizing the number of writing operations for memory elements is employed, for example. However, a complicated peripheral circuit is needed to realize the method. Even if such a method is employed, the basic problem of lifetime is not resolved. That is, a flash memory is unsuitable for application in which data is written with high frequency.
Further, high voltage is required to retain charge in the floating gate or to remove the charge in the floating gate. Furthermore, a relatively long time is required for retaining or removing a charge and the speed of writing and erasing cannot easily be increased.